High-voltage, field-effect transistors (HVFETs) are well known in the semiconductor arts. Many HVFETs employ a device structure that includes an extended drain region that supports or blocks the applied high-voltage (e.g., several hundred volts) when the device is in the “off” state. A conventional HVFET structure has a source region and a drain region separated by an intermediate channel region. A gate structure is disposed over a thin gate oxide layer over the metal-oxide-semiconductor (MOS) channel of the device. In the “on” state, a voltage is applied to the gate to cause a conduction channel to form between the source and drain regions, thereby allowing current to flow through the device. In the off state, the voltage on the gate is sufficiently low such that no conduction channel is formed in the substrate, and thus no current flow occurs. In the off state, high voltage is supported between the drain and source regions.
Power integrated circuits that include HVFET structures are commonly utilized for a multitude of purposes and applications. For instance, the '977 patent application discloses the use of HVFETs in a circuit for discharging an electromagnetic interference (EMI) filter capacitor (commonly referred to as an X class safety capacitor, or XCAP for short) coupled across the input terminals of a power converter circuit. By way of example, FIG. 2 of the '977 patent application shows two n-channel HVFETs having their drains coupled across an XCAP at the input terminals of a power converter. The sources of the HVFETs are coupled together at an internal ground node. The gates of the HVFETs are coupled to a timing and control circuit, which detects whether an AC electrical energy source is coupled to the input terminals of the power converter. If the electrical energy source is disconnected, the timing and control circuit drives the HVFETs on, thereby providing a current path that rapidly discharges the XCAP. In order to properly switch the gates of the discharge HVFET it is critical that the gate charge of the HVFET be minimized.